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dg458/459 vishay siliconix document number: 70064 s-52433?rev. f, 06-sep-99 www.vishay.com 1 fault-protected single 8-ch/differential 4-ch analog multiplexers

fault and overvoltage protection all channels off when power off latchup-proof fast switching?t a : 200 ns break-before-make switching low on-resistance: 180 low power consumption: 3 mw ttl and cmos compatible inputs improved ruggedness power loss protection prevents adjacent channel crosstalk standard logic interface superior accuracy fast settling time data acquisition systems industrial process control systems avionics test equipment high-rel control systems telemetry

the dg458 and DG459 are 8-channel single-ended and 4-channel differential analog multiplexers, respectively, incorporating fault protection. a series n-p-n mosfet structure provides device and signal-source protection in the event of power loss or overvoltages. under fault conditions the multiplexer input (or output) appears as an open circuit and only a few nanoamperes of leakage current will flow. this protects not only the multiplexer and the circuitry following it, but also protects the sensors or signal sources which drive the multiplexer. the dg458 and DG459 can withstand continuous overvoltage inputs up to 35 v. all digital inputs have ttl compatible logic thresholds. break-before-make operation prevents channel- to-channel interference. the dg458 and DG459 are improved pin-compatible replacements for hi-508a/509a and max358/359 multiplexers.

s 3 a 0 s 6 d s 4 a 1 s 8 s 7 en dual-in-line a 2 v? gnd s 1 v+ s 2 s 5 decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 top view 89 a 0 d a a 1 d b en gnd v? v+ s 1a s 1b s 2a s 2b s 3a s 3b s 4a s 4b dual-in-line decoders/drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 top view 89 dg458 DG459
dg458/459 vishay siliconix www.vishay.com 2 document number: 70064 s-52433 ? rev. f, 06-sep-99

a 2 a 1 a 0 en on switch x x x 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 a 1 a 0 en on switch x x 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 logic ? 0 ? = v al 0.8 v logic ? 1 ? = v ah 2.4 v x = don ? t care

temp range package part number dg458dj ? 40 to 85 c 16-pin plastic dip DG459dj dg458ak/883 16-pin cerdip DG459ak/883 ? 55 to 125 c dg458az/883 lcc-20 DG459az/883 *block diagram and pin configuration not shown.

v+ to v ? 44 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v+ to gnd 22 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ? to gnd ? 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v en , v a digital input (v ? ) ? 4 v to (v+) +4 v . . . . . . . . . . . . . . . . . . . . . . . . . . . v s , analog input overvoltage with power on (v ? ) ? 20 v to (v+) +20 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s , analog input overvoltage with power off ? 35 v to +35 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current, s or d 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peak current, s or d (pulsed at 1 ms, 10% duty cycle max) 40 ma . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature (ak suffix) ? 65 to 150 c . . . . . . . . . . . . . . . . . . (dj suffix) ? 65 to 125 c . . . . . . . . . . . . . . . . . . power dissipation (package) a 16-pin plastic dip b 600 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-pin cerdip c 1000 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lcc-20 d 1000 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. all leads soldered or welded to pc board. b. derate 6.3 mw/ c above 25 c. c. derate 12 mw/ c above 75 c. d. derate 10 mw/ c above 75 c.
dg458/459 vishay siliconix document number: 70064 s-52433 ? rev. f, 06-sep-99 www.vishay.com 3

test conditions unless otherwise specified a suffix ? 55 to 125 c d suffix ? 40 to 85 c parameter symbol v+ = 15 v, v ? = ? 15 v v al = 0.8 v, v ah = 2.4 v f temp b typ c min d max d min d max d unit analog switch analog signal range g v analog full ? 10 10 ? 10 10 v drain-source r ds(on) v d = 9.5 v, i s = ? 400 a room full 0.45 1.2 1.5 1.5 1.8 k on-resistance r ds(on) v d = 5 v, i s = ? 400 a room 180 400 400 r ds(on) matching between channels h r ds(on) v d = 0 v, i s = ? 400 a room 6 % source off leakage current i s(off) v en = 0 v v s = 10 v, v d = 10 v room full 0.03 ? 0.5 ? 50 0.5 50 ? 1 ? 20 1 20 drain off v en = 0 v dg458 room full 0.1 ? 1 ? 200 1 200 ? 1 ? 50 1 50 drain off leakage current i d(off) v d = 10 v v s = 10 v DG459 room full 0.1 ? 1 ? 100 1 100 ? 2 ? 25 2 25 differential off drain leakage current i diff DG459 only room ? 50 50 ? 20 20 na drain on dg458 room full 0.1 ? 2 ? 200 2 200 ? 5 ? 50 5 50 drain on leakage current i d(on) v s = v d = 10 v DG459 room full 0.05 ? 2 ? 100 2 100 ? 5 ? 25 5 25 fault output leakage current (with overvoltage) i d(off) v s = 33 v, v d = 0 v see figure 2 room 0.02 na input leakage current (with overvoltage) v s = 25 v, v d = 10 v, see figure 2 room 0.005 ? 5 5 ? 10 10 25 v, v sups = 0 v v d = a 0 , a 1 , a 2 , en = 0 v room 0.001 ? 2 2 ? 5 5 a digital control input low threshold v al full 0.8 0.8 input low threshold v al full 2.4 2.4 v logic input control i a v a = 2.4 v or 0.8 v full ? 1 1 ? 1 1 a dynamic characteristics transition time t a see figure 3 room 200 500 500 break-before-make time t open see figure 4 room 45 10 10 enable turn-on time t on(en) room full 140 250 500 250 500 ns enable turn-off time t off(en) see figure 5 room full 50 250 500 250 500 to 0.1 % room 0.5 s off isolation oirr v en = 0 v, r l = 1 k , c l = 15 pf v s = 3 v rms, f = 100 khz room 90 db logic input capacitance c in f = 1 mhz room 5 source off capacitance c s(off) room 5 dg458 room 15 drain off capacitance c d(off) DG459 room 10 pf dg458 room 40 drain on capacitance c d(on) DG459 room 35
dg458/459 vishay siliconix www.vishay.com 4 document number: 70064 s-52433 ? rev. f, 06-sep-99

test conditions unless otherwise specified a suffix ? 55 to 125 c d suffix ? 40 to 85 c parameter symbol v+ = 15 v, v ? = ? 15 v v al = 0.8 v, v ah = 2.4 v f temp b typ c min d max d min d max d unit power supplies positive supply current i+ room full 0.05 0.1 0.2 0.1 0.2 negative supply current i ? v en = 5.0 or 0 v, v a = 0 v room full ? 0.01 ? 0.1 ? 0.2 ? 0.1 ? 0.2 ma power supply range for continuous operation room 4.5 18 4.5 18 v notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function. g. when the analog signal exceeds the +13.5 v or ? 12 v, r ds(on) starts to rise until only leakage currents flow. h. r ds(on) r ds(on) max ? r ds(on) min r ds(on) ave x 100%

input leakage vs. input voltage off-channel leakage currents vs. input voltage v s ? source voltage (v) ? source current i s ? source current i s v s ? source voltage (v) ? 50 0 50 ? 40 ? 30 ? 20 ? 10 10 20 30 40 ? 50 0 50 1 ma 100 a 10 a 1 ma 100 na 10 na 1 na 100 pa 10 pa 1 pa ? 40 ? 30 ? 20 ? 10 10 20 30 40 operating range operating range v+ = v ? = 0 v v+ = 15 v v ? = ? 15 v 1 ma 100 a 10 a 1 ma 100 na 10 na 1 na 100 pa 10 pa 1 pa
dg458/459 vishay siliconix document number: 70064 s-52433 ? rev. f, 06-sep-99 www.vishay.com 5

output leakage vs. off-channel overvoltage r ds(on) vs. input voltage leakage currents vs. temperature switching times (t trans , t on , t off ) vs. v supplies r ds(on) vs. v d and temperature leakage current vs. v s , v d ? drain current i d ? leakage (pa) i , i sd (na) i , i sd time (ns) v s ? source voltage (v) v s ? source voltage (v) v d ? drain voltage (v) v d or v s ? drain or source voltage (v) temperature ( c) v+, v ? positive and negative supplies (v) 1 na 0.1 pa ? 50 ? 40 50 100 pa 10 pa 1 pa ? 30 ? 20 ? 100 10203040 2000 400 0 025 20 15 10 5 ? 20 ? 15 ? 10 ? 5 800 1200 1600 5 v supplies 10 v 15 v 20 v v+ = 15 v v ? = ? 15 v 25 ? 15 ? 25 015 12 9 6 3 ? 12 ? 9 ? 6 ? 3 ? 5 5 15 700 ? 10 0 10 600 500 400 0 300 200 100 5.0 ? 5.0 ? 15 20 ? 20 ? 10 0 10 i d(on) i s(off) i d(off) v+ = 15 v v ? = ? 15 v 2.5 ? 2.5 ? 7.5 7.5 125 c ? 55 c v+ = 15 v v ? = ? 15 v 10 ? 55 ? 35 125 1 0.10 0.01 240 200 160 120 80 40 ? 15 5 25 45 65 85 105 i s(off) i d(on) 5 10 15 20 t trans t on(en) t off(en) v in = 2 v v+ = 15 v v ? = ? 15 v v s , v d = 10 v 85 c 25 c 0 c i d(off) r ds(on) ? drain-source on-resistance ( ) r ds(on) ? drain-source on-resistance ( )
dg458/459 vishay siliconix www.vishay.com 6 document number: 70064 s-52433 ? rev. f, 06-sep-99

switching times vs. temperature off isolation and x talk vs. frequency q inj vs. v s logic input switching threshold vs. v supplies v s ? source voltage (v) v+, supply (v) f ? frequency (hz) temperature ( c) time (ns) charge injection (pc) (db) (v) th v 280 240 0 200 160 120 80 40 0 ? 10 ? 30 ? 40 ? 60 ? 10 ? 50 510 ? 55 ? 35 125 ? 15 5 25 45 65 85 105 t open v+ = 15 v v ? = ? 15 v ? 50 ? 20 v+ = 15 v v ? = ? 15 v c l = 1 nf c l = 10 nf ? 110 10 k 100 k 10 m ? 100 ? 90 ? 50 ? 80 ? 70 ? 60 1 m 2.5 5 7.5 10 12.5 15 17.5 20 3.0 2.0 1.5 1.0 0.5 0 v+ = 15 v v ? = ? 15 v r l = 1 k off isolation crosstalk 2.5 t trans t on(en) t off(en)

figure 1. gnd s 1 a 0 d s n v ? decode/ drive level shift v ? v+ v ref v+ v ? a x en v+ v ? v+
dg458/459 vishay siliconix document number: 70064 s-52433 ? rev. f, 06-sep-99 www.vishay.com 7

figure 2. analog input overvoltage a +15 v i d(off) v d d v+ v ? ? 15 v s n v s i s(off) a figure 3. transition time figure 4. break-before-make time s 1b s 8b a 2 d b a 1 * a 0 * = s 1a ? s 8a , s 2b ? s 7b , d a 50 1 m v o 5 v 5 v +2.4 v +15 v ? 15 v en v+ v ? gnd 35 pf 50% +5 v ? 5 v 90% 0 v 3 v logic input t a switch output v o dg458 a 2 d b , d s 2 ? s 7 1 k v o a 1 50 a 0 en v+ gnd v ? 35 pf ? 15 v +15 v +2.4 v dg458 logic input t open 0 v 3 v 50% 0 v v o switch output s 1 , s 8 +5 v
dg458/459 vishay siliconix www.vishay.com 8 document number: 70064 s-52433 ? rev. f, 06-sep-99

figure 5. enable delay s 1 s 2 ? s 8 a 0 a 1 a 2 50 1 k v o en v+ gnd v ? d 35 pf ? 15 v +15 v dg458 0 v 3 v 0 v 90% 50% enable input v o switch output v s t on(en) t off(en +5 v

the vishay siliconix dg458 and DG459 multiplexers are fully fault- and overvoltage-protected for continuous input voltages up to 35 v whether or not voltage is applied to the power supply pins (v+, v ? ). these multiplexers are built on a high-voltage junction-isolated silicon-gate cmos process. two n-channel and one p-channel mosfets are connected in series to form each channel (figure 1). within the normal analog signal range ( 10 v), the r ds(on) variation as a function of analog signal voltage is comparable to that of the classic parallel n-mos and p-mos switches. when the analog signal approaches or exceeds either supply rail, even for an on-channel, one of the three series mosfets gets cut-off, providing inherent protection against overvoltages even if the multiplexer power supply voltages are lost. this protection is good up to the breakdown voltage of the respective series mosfets. under fault conditions only sub microamp leakage currents can flow in or out of the multiplexer. this not only provides protection for the multiplexer and succeeding circuitry, but it allows normal, undisturbed operation of all other channels. additionally, in case of power loss to the multiplexer, the loading caused on the transducers and signal sources is insignificant, therefore redundant multiplexers can be used on critical applications such as telemetry and avionics. figure 6. overvoltage protection ? 15 v ? 15 v +15 v ? 35 v overvoltage +35 v overvoltage q 1 q 2 q 3 n-channel mosfet is on p-channel mosfet is off n-channel mosfet is off (b) overvoltage with multiplexer power on ? 15 v +15 v d s g d s g d s g ? 35 v overvoltage +35 v overvoltage q 1 q 2 q 3 ? 35 v n-channel mosfet is on p-channel mosfet is off n-channel mosfet is off (a) overvoltage with multiplexer power off

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